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 DM74LS240 * DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver
August 1986 Revised March 2000
DM74LS240 * DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver
General Description
These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133.
Features
s 3-STATE outputs drive bus lines directly s PNP inputs reduce DC loading on bus lines s Hysteresis at data inputs improves noise margins s Typical IOL (sink current) 24 mA s Typical IOH (source current) -15 mA s Typical propagation delay times Inverting Noninverting 10.5 ns 12 ns
s Typical enable/disable time 18 ns s Typical power dissipation (enabled) Inverting Noninverting 130 mW 135 mW
Ordering Code:
Order Number DM74LS240WM DM74LS240SJ DM74LS240N DM74LS241WM DM74LS241N Package Number M20B M20D N20A M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagrams
DM74LS240
DM74LS241
(c) 2000 Fairchild Semiconductor Corporation
DS006411
www.fairchildsemi.com
DM74LS240 * DM74LS241
Function Tables
DM74LS240 Inputs G L L H A L H X Output Y H L Z G X X X H H L
L = LOW Logic Level H = HIGH Logic Level X = Either LOW or HIGH Logic Level Z = High Impedance
DM74LS241 Inputs G L L H X X X 1A L H X X X X 2A X X X L H X Outputs 1Y L H Z L H Z 2Y
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2
DM74LS240 * DM74LS241
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0C to +70C -65C to +150C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature 0 Parameter Min 4.75 2 0.8 -15 24 70 Nom 5 Max 5.25 Units V V V mA mA C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted) Symbol VI HYS VOH Parameter Input Clamp Voltage Hysteresis (VT+ - VT-) Data Inputs Only HIGH Level Output Voltage Conditions VCC = Min, II = -18 mA VCC = Min VCC = Min, VIH = Min VIL = Max, IOH = -1 mA VCC = Min, VIH = Min VIL = Max, IOH = -3 mA VCC = Min, VIH = Min VIL = 0.5V, IOH = Max VOL LOW Level Output Voltage VCC = Min VIL = Max VIH = Min IOZH IOZL II IIH IIL IOS ICC Off-State Output Current, HIGH Level Voltage Applied Off-State Output Current, LOW Level Voltage Applied Input Current at Maximum Input Voltage HIGH Level Input Current LOW Level Input Current Short Circuit Output Current Supply Current VCC = Max VI = 7V VCC = Max, VI = 2.7V VCC = Max, VI = 0.4V VCC = Max (Note 3) VCC = Max, Outputs OPEN Outputs HIGH Outputs LOW Outputs Disabled
Note 2: All typicals are at VCC = 5V, TA = 25C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Min
Typ (Note 2)
Max -1.5
Units V V
0.2 2.7 2.4 2 IOL = 12 mA IOL = Max VO = 2.7V VO = 0.4V
0.4
3.4
V
0.4 0.5 20 -20 0.1 20 -0.2 -40 13 26 27 29 32 -225 23 44 46 50 54 mA V
VCC = Max VIL = Max VIH = Min
A A mA A mA mA
3
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DM74LS240 * DM74LS241
Switching Characteristics
at VCC = 5V and TA = 25C Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ tPLH tPHL tPZL tPZH Parameter Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to LOW Level Output Enable Time to HIGH Level Output Disable Time from LOW Level Output Disable Time from HIGH Level Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to LOW Level Output Enable Time to HIGH Level CL = 45 pF RL = 667 CL = 45 pF RL = 667 CL = 45 pF RL = 667 CL = 45 pF RL = 667 CL = 5 pF RL = 667 CL = 5 pF RL = 667 CL = 150 pF RL = 667 CL = 150 pF RL = 667 CL = 150 pF RL = 667 CL = 150 pF RL = 667 Conditions DM74LS240 DM74LS241 DM74LS240 DM74LS241 DM74LS240 DM74LS241 DM74LS240 DM74LS241 DM74LS240 DM74LS241 DM74LS240 DM74LS241 DM74LS240 DM74LS241 DM74LS240 DM74LS241 DM74LS240 DM74LS241 DM74LS240 DM74LS241 Max 14 18 18 18 30 30 23 23 25 25 18 18 18 21 22 22 33 33 26 26 Units ns ns ns ns ns ns ns ns ns ns
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4
DM74LS240 * DM74LS241
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B
5
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DM74LS240 * DM74LS241
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Description M20D
www.fairchildsemi.com
6
DM74LS240 * DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
www.fairchildsemi.com


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